Power converter including a power module allowing main current supply and cutoff

ABSTRACT

A power converter includes a power module allowing supply and cutoff of main current, a driver module controlling supply and cutoff of the main current, a high potential side semiconductor device, and a low potential side semiconductor device. Plural power module side wirings are connected with respective electrodes contained in the high and low potential side semiconductor devices. Plural driver module side wirings are provided on the driver module as wirings connected with the plural corresponding power module side wirings. Conductors are disposed in the vicinity of a plane on which the plural power module side wirings are provided and a plane on which the plural driver module side wirings are provided, and electrically connected to surround magnetic flux generated by current looping at least through a power source transformer, the driver module side wirings, and the power module side wirings.

TECHNICAL FIELD

The present invention relates to a power converter, and moreparticularly to a power converter for a hybrid system of an automobile.

BACKGROUND ART

A power converter for a hybrid system of an automobile controls motorcurrent by switching of a power semiconductor device. With increase inthe output from the hybrid system in recent years, motor current andvoltage of the system are increasing. Therefore, the problem of surgevoltage generated at the time of switching of the power semiconductordevice has been an issue to overcome.

Conventionally, surge voltage generated by switching is decreased byreduction of main circuit inductances of the power semiconductor deviceand a capacitor achieved by shortening the wiring lengths of the powersemiconductor device and the capacitor and laminating the wiringsthereof, and laminating the wirings inside the capacitor, or by othermethods (for example, see PTL 1). The reduction of surge voltage allowshigh-speed switching and thus achieves reduction of losses, so that thefuel cost of the vehicle can improve.

CITATION LIST Patent Literature

-   PTL 1: JP-A-2009-44891

SUMMARY Technical Problem

It is expected that the reduction of the main circuit inductancediscussed above is effective for reduction of surge voltage. However,high-speed switching changes current flowing in the power semiconductordevice more rapidly, and thus raises surge voltage. More specifically,the switching speed increases by reduction of surge voltage when thewithstand voltage of the power semiconductor device is uniform. However,with increase in the switching speed, the possibility of oscillation ofgate current flowing at the time of connection and disconnection of thepower semiconductor device rises. Moreover, gate current in the relatedart flows through a long wiring between the semiconductor devicedisposed on the lower side and a printed board disposed on the upperside. Therefore, the possibility of gate current oscillation furtherincreases.

In addition, surge voltage generated by switching of the powersemiconductor device affects the printed board electrically connectedwith the power semiconductor device, and a power source transformergenerating power supply for gate current. More specifically, surgevoltage attenuated by wiring or the like is superposed on power sourcetransformer output voltage and wiring pattern voltage of the printedboard. As a result of voltage fluctuations caused by the surge voltage,leakage current is generated by stray capacitance between wiringpatterns on the printed board, and stray capacitance of the power sourcetransformer. In this condition, noise is produced throughout the printedboard.

The leakage current in the related art becomes a loop current whichpasses from the power semiconductor toward the printed board and returnsto the power semiconductor when flowing in the longest path. Moreover,due to the large wiring length as noted above, the stray capacitance andthe wiring inductance are high, while the noise resistance is low. Thus,the power semiconductor device may be accidentally turned on by thenoise generated by the leakage current, in which case the powersemiconductor device is broken in the worst case.

Solution to Problem

A first aspect of the invention is directed to a power converter whichhas a power module allowing supply and cutoff of main current, and adriver module controlling supply and cutoff of the main current allowedby the power module and includes: a high potential side semiconductordevice which allows supply and cutoff of the main current on the highpotential side of the power module; a low potential side semiconductordevice which allows supply and cutoff of the main current on the lowpotential side of the power module, and is connected with the highpotential side semiconductor device in series; plural power module sidewirings connected with respective electrodes contained in the highpotential side semiconductor device and the low potential sidesemiconductor device, and disposed adjacent to each other substantiallyon the same plane as the power module in the order of applied potentialswith a connection end between the plural power module side wirings andthe driver module located along the end of the power module; pluraldriver module side wirings provided on the driver module as wiringsconnected with the plural corresponding power module side wirings, anddisposed adjacent to each other substantially on the same plane as thedriver module in the order corresponding to the positions of the pluralpower module side wirings in positions along the end of the drivermodule; a power source transformer as a circuit provided on the drivermodule to convert a signal voltage for controlling the supply and cutoffof the main current into voltage applied to a control electrode of thehigh potential side semiconductor device and a control electrode of thelow potential side semiconductor device, plural terminals of the powersource transformer in correspondence with the plural driver module sidewirings being provided in the order of the positions of the pluralcorresponding driver module side wirings; conductors disposed in thevicinity of the plane on which the plural power module side wirings areprovided and in the vicinity of the plane on which the plural drivermodule side wirings are provided, and electrically connected in suchpositions as to surround magnetic flux generated by current looping atleast through the power source transformer, the driver module sidewirings, and the power module side wirings.

According to a second aspect of the invention, it is preferable that, inthe power converter of the first aspect, the plural power module sidewirings are disposed substantially on the same plane as the power modulein such positions that current in one wiring of the power module sidewirings flows in a direction opposed to the flow direction of current inanother wiring of the power module side wirings disposed adjacent to theone wiring.

According to a third aspect of the invention, it is preferable that, inthe power converter of the first or second aspect, an input terminalthrough which the main current is inputted to the power module and anoutput terminal through which the main current is outputted from thepower module are disposed at the end of the power module on the sideopposite to the side where the connection end between the power moduleand the driver module is positioned.

According to a forth aspect of the invention, it is preferable that, inthe power converter of the third aspect, there are provided on the planewhere the plural power module side wirings are disposed, a highestpotential extracting wiring as a side of the highest potential wiring towhich the highest potential is applied in the plural power module sidewirings, disposed in an area on the side opposite to the side where thelowest potential wiring to which the lowest potential is applied in theplural power module side wirings is disposed, and electrically connectedwith the highest potential wiring, with a connection end between thehighest voltage extracting wiring and the driver module disposed at theend of the power module on the side where the connection end between theplural power module side wirings and the driver module is positioned,and a lowest potential extracting wiring disposed adjacent to thehighest potential extracting wiring in the area on the opposite side insuch a position that current flows in a direction opposed to the highestpotential extracting wiring, and electrically connected with the lowestpotential wiring, with a connection end between the lowest potentialextracting wiring and the driver module disposed at the end of the powermodule on the side where the connection end between the plural powermodule side wirings and the driver module is positioned. In this case,the plural driver module side wirings contain wirings connected with thehighest potential extracting wiring and the lowest potential extractingwiring, and are disposed in correspondence with the highest potentialextracting wiring and the lowest potential extracting wiring as well.

According to a fifth aspect of the invention, it is preferable that, inthe power converter of any one of the first through fourth aspects, ahigh potential side gate wiring contained in the plural power moduleside wirings and connected with a gate electrode of the high potentialside semiconductor device, and a high potential side emitter wiringconnected with an emitter electrode of the high potential sidesemiconductor device and the corresponding wiring of the plural drivermodule side wirings are disposed adjacent to each other in suchpositions that flow directions of currents flowing in the high potentialside gate wiring and the high potential side emitter wiring are opposedto each other.

According to a sixth aspect of the invention, it is preferable that, inthe power converter of the fifth aspect, the emitter electrode of thehigh potential side semiconductor device is connected in parallel with alow potential side collector wiring connected with the high potentialside emitter wiring and a collector electrode of the low potential sidesemiconductor device.

According to a seventh aspect of the invention, it is preferable that,in the power converter of any one of the first through sixth aspects, alow potential side gate wiring contained in the plural power module sidewirings and connected with a gate electrode of the low potential sidesemiconductor device, and a low potential side emitter wiring connectedwith an emitter electrode of the low potential side semiconductor deviceand the corresponding wiring of the plural driver module side wiringsare disposed adjacent to each other in such positions that flowdirections of currents flowing in the low potential side gate wiring andthe low potential side emitter wiring are opposed to each other.

According to an eighth aspect of the invention, it is preferable that,in the power converter of the seventh aspect, the emitter electrode ofthe low potential side semiconductor device is connected in parallelwith the low potential side emitter wiring and an output terminal wiringconnected with an output terminal which outputs the main current fromthe power module.

According to a ninth aspect of the invention, it is preferable that, inthe power converter of any one of the first through eighth aspects, thepower module and the driver module are disposed adjacent to each othersuch that the plane on which the plural power module side wirings areprovided and the plane on which the plural driver module side wiringsare provided become substantially parallel with each other. In thiscase, the conductors are disposed as integrated conductors in thevicinity of the plane on which the plural power module side wirings areprovided and in the vicinity of the plane on which the plural drivermodule side wirings are provided.

According to a tenth aspect of the invention, it is preferable that, inthe power converter of any one of the first through eighth aspects, thepower module and the driver module are disposed such that the plane onwhich the plural power module side wirings are provided and the plane onwhich the plural driver module side wirings are provided become parallelwith each other and overlap with each other. In this case, a firstconductor disposed in the vicinity of the plane on which the pluralpower module side wirings are provided and a second conductor disposedin the vicinity of the plane on which the plural driver module sidewirings are provided are electrically connected with each other by afixing member which fixes at least either the first conductor or thesecond conductor.

According to an eleventh aspect of the invention, it is preferable that,in the power converter of any one of the first through eighth aspects,the power module and the driver module are disposed such that the planeon which the plural power module side wirings are provided and the planeon which the plural driver module side wirings are provided cross eachother substantially at right angles. In this case, a first conductordisposed in the vicinity of the plane on which the plural power moduleside wirings are provided and a second conductor disposed in thevicinity of the plane on which the plural driver module side wirings areprovided are electrically connected with each other by a fixing memberwhich fixes at least either the first conductor or the second conductor.

According to a twelfth aspect of the invention, it is preferable that,in the power converter of any one of the first through eleventh aspects,the driver module has a multilayer wiring substrate. In this case,current flowing the driver module side wirings connected with the powermodule side wirings connected with the gate electrodes of the highpotential side semiconductor device and the low potential sidesemiconductor device, and current flowing the driver module side wiringsconnected with the power module side wirings connected with the emitterelectrodes of the high potential side semiconductor device and the lowpotential side semiconductor device pass through different layers in thedriver module to reach the power source transformer.

Advantageous Effects of the Invention

According to the invention, a power converter capable of reducing lossesand improving noise resistance is provided by utilizing a high-speedswitching technology which does not cause oscillation of gate current ofa power semiconductor device, and a technology which reduces leakagecurrent produced by surge voltage.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates the general structure of a power converter accordingto an embodiment of the invention.

FIG. 2 illustrates the details of an enlarged part of an insulatingsubstrate according to the embodiment of the invention.

FIG. 3 illustrates the details of an enlarged part of a connectionportion of the insulating substrate according to the embodiment of theinvention.

FIG. 4 illustrates the details of an enlarged part of a printed-wiringboard according to the embodiment of the invention.

FIG. 5 is an equivalent circuit diagram of the power converter accordingto the embodiment of the invention.

FIG. 6 illustrates the printed board and a power source transformeraccording to the embodiment of the invention.

FIG. 7 illustrates the printed board and the power source transformeraccording to the embodiment of the invention.

FIG. 8 illustrates an example of a related art.

FIG. 9 is a cross-sectional view of the power converter according to theembodiment of the invention.

FIG. 10 illustrates the details of an enlarged part of an insulatingsubstrate according to a different embodiment of the invention.

FIG. 11 is an equivalent circuit diagram of a power converter accordingto the different embodiment of the invention.

FIG. 12 illustrates the details of an enlarged part of an insulatingsubstrate according to a further different embodiment of the invention.

FIG. 13 illustrates the details of an enlarged part of an insulatingsubstrate according to a still further different embodiment of theinvention.

FIG. 14 illustrates the details of an enlarged part of an insulatingsubstrate and a printed-wiring board according to a still furtherdifferent embodiment of the invention.

FIG. 15 illustrates the details of an enlarged part of an insulatingsubstrate and a printed-wiring board according to a still furtherdifferent embodiment of the invention.

FIG. 16 is a cross-sectional view of the insulating substrate and theprinted-wiring board according to the still further different embodimentof the invention.

FIG. 17 illustrates the details of an enlarged part of an insulatingsubstrate and a printed-wiring board according to a still furtherdifferent embodiment of the invention.

FIG. 18 is a cross-sectional view of the insulating substrate and theprinted-wiring board according to the still further different embodimentof the invention.

FIG. 19 is a cross-sectional view of the insulating substrate and theprinted-wiring board according to the still further different embodimentof the invention.

FIG. 20 is a perspective view of a printed-wiring board according to astill further different embodiment of the invention.

DESCRIPTION OF EMBODIMENTS Embodiment 1

An embodiment according to the invention is hereinafter described withreference to FIG. 1.

FIG. 1 illustrates a power converter according to an example of theinvention. FIGS. 2 and 3 illustrate the details of an enlarged partshown in FIG. 1. In FIG. 2, emitter electrodes and upper arm gateelectrodes 6 a and 6 b are provided on the upper surfaces of upper armIGBT (insulated gate bipolar transistor) chips 1 a and 1 b,respectively, and collector electrodes are provided on the lowersurfaces of the chips 1 a and 1 b. On the other hand, anode electrodesare provided on the upper surfaces of upper arm diode chips 2 a and 2 b,and cathode electrodes are provided on the lower surfaces of the chips 2a and 2 b. Lower arm IGBT chips 3 a and 3 b, and lower arm diode chips 4a and 4 b have terminals similar to the corresponding terminals of theupper arm.

The lower surfaces of the upper arm IGBT chips 1 a and 1 b and the upperarm diode chips 2 a and 2 b are brazed by solder or the like onto apositive electrode wiring pattern 11 formed on an insulating substrate10, while the emitter electrodes and the cathode electrodes on the uppersurfaces are connected with an alternating current wiring pattern 12 avia aluminum wires 21 a, 21 b, 22 a, and 22 b. The upper arm gateelectrodes 6 a and 6 b are connected with upper arm gate wiring patterns14 a and 14 b via aluminum wires 25 a and 25 b.

The lower surfaces of the lower arm IGBT chips 3 a and 3 b and the upperarm diode chips 4 a and 4 b are brazed by solder or the like to thealternating current wiring pattern 12 a formed on the insulatingsubstrate 10, while the emitter electrodes and the cathode electrodes onthe upper surfaces are connected with a negative electrode wiringpattern 13 via aluminum wires 23 a, 23 b, 24 a, and 24 b. Lower arm gateelectrodes 7 a and 7 b are connected with lower arm gate wiring patterns15 a and 15 b via aluminum wires 26 a and 26 b.

The insulating substrate 10 is constituted by an insulating plate madeof ceramic or the like having both surfaces of which metal foils such ascopper foils are attached. The insulating substrate 10 is brazed bysolder or the like to a base 20 formed by a copper plate or a compositematerial plate, for example, to be fixed thereto. The wiring patternsprovided on the upper surface of the insulating substrate 10 include thenegative electrode wiring pattern 13, the lower arm gate wiring patterns15 b and 15 a, the alternating current wiring pattern 12 a and analternating current wiring pattern 12 b, the upper arm gate wiringpatterns 14 a and 14 b, and the positive electrode wiring pattern 11 inthis order from the lower end of the insulating substrate 10, all ofwhich patterns 11 through 15 b are arranged substantially in thehorizontal direction. Thermistor wiring patterns 17 b, 17 a, 19, and 18are provided at the upper end of the insulating substrate 10.Thermistors 5 a and 5 b are disposed in the vicinity of the upper armIGBT chips 1 a and 1 b, respectively, and connected with the thermistorwiring patterns 17 a, 17 b, 18, and 19 via solder or the like.

The alternating current wiring pattern 12 a and the alternating currentwiring pattern 12 b are connected with each other via an aluminum ribbon27 while crossing over the lower arm IGBT chips 3 a and 3 b and thediode chips 4 a and 4 b. FIG. 2 does not show the whole of the aluminumribbon 27 but shows only the connection point thereof for easyunderstanding of the figure. While each of the aluminum wires shown inthe figures has one or two wires, the number of the wires constitutingeach of the aluminum wires is not specifically limited. Similarly, thenumber of the ribbons constituting the aluminum ribbon is notspecifically limited. The aluminum ribbon and the aluminum wires may bereplaced with other connection conductors. The arrangements of the IGBTchips and the diode chips are not specifically limited.

As illustrated in FIG. 3, a terminal stand 30 has a positive electrodebus bar 31, an alternating current bus bar 32, and a negative electrodebus bar 33. The respective bus bars are supported and insulated by resinor other insulating materials, and formed by integral molding, forexample. The terminal stand 30 is disposed adjacent to the insulatingsubstrate 10. The respective bus bars on the terminal stand are locatednear the side adjacent to the insulating substrate 10. The respectivebus bars on the terminal stand 30 are provided in the order of thenegative electrode bus bar 33, the alternating current bus bar 32, andthe positive electrode bus bar 31 from the lower end of the insulatingsubstrate 10, that is, from one end thereof in the direction orthogonalto the direction where the insulating substrate 10 and the terminalstand 30 are disposed adjacent to each other. The negative electrode busbar 33, the alternating current bus bar 32, and the positive electrodebus bar 31 are connected with the negative wring pattern 13, thealternating current wiring pattern 12 b, and the positive electrodewiring pattern 11 on the insulating substrate 10, respectively, via analuminum ribbon 72.

The connection portions of the respective bus bars 31, 32, and 33 andthe aluminum ribbon 72 are positioned substantially in parallel with thecorresponding wiring patterns 11, 12 a, 12 b, and 13 on the insulatingsubstrate 10. The terminal stand 30 has a connection terminal 34functioning as an interface with the outside. The interface between theconnection terminal 34 and the outside will be described later. Thealuminum ribbon 72 in the figure may be other types of connectionconductor such as an aluminum wire.

The structure provided on the insulating substrate 10 and the terminalstand 30 functions as a power module which allows primary supply andcutoff of main current in the power converter according to thisembodiment. The upper arm IGBT chips 1 a and 1 b constitute a highpotential side semiconductor device which allows supply and cutoff ofmain current on the high potential side in the power module. Similarly,the lower arm IGBT chips 3 a and 3 b are connected with the upper armIGBT chips 1 a and 1 b in series to function as a low potential sidesemiconductor device which allows supply and cutoff of main current onthe low potential side.

The positive electrode wiring pattern 11, the alternating current wiringpatterns 12 a, 12 b, the negative electrode wiring pattern 13, the upperarm gate wiring patterns 14 a and 14 b, and the lower arm gate wiringpatterns 15 a and 15 b are disposed adjacent to each other on the powermodule in the order of the applied potentials. Each of the patterns 11through 15 b functions as a power module side wiring.

Patterns 41, 42, 43, 44, 45, and 46 electrically connected with therespective wiring patterns on the insulating substrate 10 are providedon the upper surface of a printed-wiring board 40 constituted by amultilayer of insulating and conductive layers. A terminal 50 isconnected with each upper surface of the patterns 41, 42, 43, 44, 45,and 46 via a conductive material such as solder. The printed-wiringboard 40 is disposed adjacent to the insulating substrate 10 on the sideopposite to the terminal stand 30. The respective patterns on which theterminals 50 are provided are disposed on the printed-wiring board 40 onthe side adjacent to the insulating substrate 10.

The structure provided on the printed-wiring board 40 functions as adriver module for controlling the foregoing power module in the powerconverter according to this embodiment. The respective patterns 41, 42,43, 44, 45, and 46, and the terminals 50 connected therewith function asdriver module side wirings connected with the power module side wiringsprovided on the power module in this embodiment.

The terminals 50 disposed on the respective patterns in the order of thenegative electrode pattern 45, the lower arm gate pattern 44, thealternating current pattern 43, the upper arm gate pattern 42, thepositive electrode pattern 41, and the thermistor pattern 46 from thelower end of the insulating substrate 10, that is, from one end thereofin the direction orthogonal to the direction where the insulatingsubstrate 10 and the printed-wiring board 40 are disposed adjacent toeach other, are connected with the negative electrode wiring pattern 13,the lower gate wiring patterns 15 a and 15 b, the alternating currentwiring pattern 12 a, the lower gate wiring patterns 14 a and 14 b, thepositive electrode wiring pattern 11, the thermistor wiring patterns 17a, 17 b, 18, and 19 on the insulating substrate 10 via an aluminum wire71. Thus, the plural driver module side wirings in this embodiment aredisposed in the order corresponding to the order of the power moduleside wirings in positions adjacent to the corresponding power moduleside wirings.

The connection portions of the respective patterns 41, 42, 43, 44, 45,and 46 with the terminals 50, the terminals 50, and the aluminum wire 71are disposed substantially in parallel with the corresponding wiringpatterns 11, 12 a, 12 b, 13, 14 a, 14 b, 15 a, 15 b, 17 a, 17 b, 18, and19 on the insulating substrate 10. While the aluminum wire 71 has onewire in the figure, the number of the wires included in the aluminumwire 71 is not specifically limited. The aluminum ribbon may be replacedwith other types of connection conductor. The aluminum wire 71 is notrequired to be connected with the terminals 50 but may be directlyconnected with the patterns on the printed-wiring board 40. Thethermistor pattern 46 and the thermistor wiring patterns 17 a, 17 b, 18,and 19 may be provided near the lower end of the insulating substrate10.

FIG. 4 is an enlarged view of the printed-wiring board 40. FIG. 5 is anexample of an equivalent circuit diagram of the invention. Theprinted-wiring board 40 includes at least a driver circuit 52 whichturns on and off the upper arm IGBT chips 1 a and 1 b and the lower armIGBT chips 3 a and 3 b, and a power source circuit 51 which producespower supply for the driver circuit. The power source circuit 51 has apower source transformer 60. The power source transformer 60 has anupper arm secondary coil 66, an upper arm secondary coil 67, a primarycoil 69, and a feedback coil 68, all of which coils are insulated fromeach other.

An upper arm power source+terminal 61 and an upper arm powersource−terminal 62 provided at one and the other ends of the upper armsecondary coil 66, respectively, are connected with an upper arm powersource+pattern 47+ and an upper arm power source−pattern 47− formed onthe printed-wiring board 40, respectively, by solder or the like. On theother hand, a lower arm power source+terminal 63 and a lower arm powersource−terminal 64 provided at one and the other ends of the lower armsecondary coil 67, respectively, are connected with a lower arm powersource+pattern 48+ and a lower arm power source−pattern 48− formed onthe printed-wiring board 40, respectively, by solder or the like.

Similarly, low voltage terminals 65 provided at both ends of the primarycoil 69 and the feedback coil 68 are connected with the patterns on theprinted-wiring board 40 by solder or the like. The upper arm powersource+terminal 61, the upper arm power source−terminal 62, the lowerarm power source+terminal 63, and the lower arm power source−terminal 64as terminals to which high voltage is applied, and the low voltageterminals 65 to which low voltage is applied are disposed along theouter periphery of the power source transformer 60 in the order of theupper arm power source+terminal 61, the upper arm power source−terminal62, the lower arm power source+terminal 63, and the lower arm powersource−terminal 64.

The positional relationship between the respective terminals on thepower source transformer 60 is dependent on the positions of thealternating current pattern 43 and the negative electrode pattern 45 onthe printed-wiring board 40. When the alternating current pattern 43 andthe negative electrode pattern 45 are disposed in this order from aboveto below as illustrated in FIG. 3, the respective terminals are disposedin the order of the upper arm power source+terminal 61, the upper armpower source−terminal 62, the lower arm power source+terminal 63, andthe lower arm power source−terminal 64 in the anticlockwise direction.When the alternating current pattern 43 and the negative electrodepattern 45 have the opposite positional relationship, the respectiveterminals are disposed in this order in the clockwise direction. The lowvoltage terminals 65 are disposed in such positions as not to be linedwith the upper arm power source+terminal 61, the upper arm powersource−terminal 62, the lower arm power source+terminal 63, and thelower arm power source−terminal 64. As illustrated in FIG. 5, the powersource transformer 60, a diode, a capacitor, and a switching circuit 53constitute a flyback converter to control the output voltage from thepower source circuit 51. This converter is not limited to the flybackconverter but may be a forward converter.

FIGS. 6 and 7 show another example of the arrangement of the upper armpower source+terminal 61, the upper arm power source−terminal 62, thelower arm power source+terminal 63, the lower arm power source−terminal64, and the low voltage terminals 65 on the power source transformer 60.In FIGS. 6 and 7, the alternating current pattern 43 and the negativeelectrode pattern 45 on the printed-wiring board 40 are disposed in thisorder in the direction from above to below similarly to the arrangementshown in FIG. 4, and the upper arm power source+terminal 61, the upperarm power source−terminal 62, the lower arm power source+terminal 63,and the lower arm power source−terminal 64 are disposed anticlockwise.

While the number of the low voltage terminals 65 is four in FIGS. 1through 7, the number of the low voltage terminals 65 may be reduced bysetting the primary coil 69 as high-side switching which uses a terminalcommon to both the primary coil and the feedback coil, for example.Alternatively, voltage may be applied to the primary coil from which thefeedback coil is eliminated to perform feedforward control, for example.The order of the arrangement of the low voltage terminals 65 is notspecifically limited. The shapes of the respective patterns on theprinted-wiring board 40 are not limited to those shown in FIGS. 1through 4. The upper arm power source+pattern 46, the upper arm powersource−pattern 47, the lower arm power source+pattern 48, and the lowerarm power source−pattern 49 may be provided in the lower layer ratherthan on the upper surface of the printed-wiring board 40.

In FIG. 1, bases 20 a, 20 b, and 20 c and insulating substrates 10 a, 10b, and 10 c are arranged in a line and fixed to a frame 80 made ofaluminum die casting by screws or the like. The terminal stand 30 andthe printed-wiring board 40 are disposed such that the insulatingsubstrates 10 a, 10 b, and 10 c are sandwiched between the terminalstand 30 and the printed-wiring board 40, and are fixed to the frame 80by screws or the like. A gate pin 70 whose terminal is arranged andfixed by insert molding or other methods is provided adjacent to theprinted-wiring board 40, and fixed to the frame 80 by screws or the liketo be connected with the printed-wiring board 40 via an aluminum wire73. The gate pin 70 functions as an interface between the printed board40 and the outside. The details of the interface with the outside willbe described later.

Areas U, V, and W of the insulating substrates 10 a, 10 b, and 10 c, thebases 20 a, 20 b, and 20 c, the terminal stand 30, and the printed board40 shown in FIG. 1 correspond to U-phase, V-phase, and W-phase of athree-phase motor. Each of the areas U, W, and W has a structure shownin FIGS. 2 through 5. The terminal stand 30 is not divided into theareas U, V, and W, but is constituted by a one-piece component made ofinsulating material such as resin. Similarly, the printed board 40 isconstituted by a one-piece substrate. Power source transformers 60 a, 60b, and 60 c are equipped for the areas U, V, and W, respectively. Thepositions of the areas U, V, and W are not limited to those shown in thefigure. The aluminum wire 73 may be constituted by other types ofconnection conductor.

According to this structure, main current flowing in the IGBT chips 1 a,1 b, 3 a, and 3 b, and the diode chips 2 a, 2 b, 4 a, and 4 b goes alonga channel Ip shown in FIG. 1 which passes through the positive electrodebus bar 31, the aluminum ribbon 72, the positive electrode wiringpattern 11, the upper arm chips, the aluminum wires 21 a, 21 b, 22 a,and 22 b, the alternating current wiring pattern 12 a, the aluminumribbon 27, the alternating current wiring pattern 12 b, the aluminumribbon 72, and the alternating current bus bar 32 in this order. Also,the main current flows along a channel In in FIG. 1 which passes throughthe alternating current bus bar 32, the aluminum ribbon 72, thealternating current wiring pattern 12 b, the aluminum ribbon 27, thealternating current wiring pattern 12 a, the lower arm chips, thealuminum wires 23 a, 23 b, 24 a, and 24 b, the negative electrode wiringpattern 13, the aluminum ribbon 72, and the negative electrode bus bar33 in this order.

These channels Ip and In shown in FIG. 1 form approximately eddy-shapedflow and allow opposed currents to flow adjacent to each other. Theseeddies generate magnetic force lines around the axis of the eddy centerin the direction perpendicular to the plane of the insulating substrate10. The magnetic force lines thus generated produce eddy current in theconductive layer of the insulating substrate 10, the base 20, and theframe 80. The effect of the eddy current reduces the inductances in themain current channels Ip and In. Moreover, the opposed currents flowingadjacent to each other produce demagnetizing effect for the magneticfield generated by the current fluctuations. This effect also reducesthe inductances in the main current channels Ip and In. Furthermore, inthe structure which draws main current toward the alternating currentwiring patterns 12 a and 12 b via the aluminum ribbon 27, the lengths ofthe current channels passing through the respective chips becomesubstantially uniform. In this case, the main current can be dividedinto equal parts.

As a consequence of the foregoing effects, the inductances in thechannels through which the main current flows become equal to or lowerthan the corresponding inductances in the related art, in whichcondition the voltage surge generated by the main current switchingdecreases. By reduction of the voltage surge, the main current switchingspeed increases, wherefore losses decrease. Moreover, by reduction ofthe voltage surge, the withstand voltage of the chips can be kept lower,in which case the voltage drop produced at the time of current flowdecreases along with reduction of the withstand voltage of the chips.Thus, the steady-state losses produced at the time of current flow alsodecrease. By reduction of these losses, the size of a cooler for coolingthe chips or the cooling capability thereof can be reduced, whichcontributes to cost reduction of the cooler. Moreover, the structurewhich divides the current into equal divisions between the chips canreduce each area of the chips, or decrease the number of the chips foreach arm from three to two as shown in FIG. 1, for example. Similarly,the insulation substrate 10 and the base 20 can be small-sized, whichcontributes to miniaturization and cost reduction of the powerconverter.

At the time of switching of the main current, recovery current flows inthe diode chips 2 a, 2 b, 4 a, and 4 b when the IGBT chips 1 a, 1 b, 3a, and 3 b are turned on. The recovery current flows into a channel Ipnof the negative electrode bus bar 33 chiefly from the positive electrodebus bar 31 via the upper and lower arms as illustrated in FIG. 1. Therecovery current channel Ipn forms a substantially U shape. According tothis structure, magnetic force lines are generated around the axis ofthe center of the U shape in the direction perpendicular to the plane ofthe insulating substrate 10, and produce eddy current in the conductivelayer of the insulating substrate 10, the base 20, and the frame 80.This eddy current reduces the inductance in the recovery current channelIpn.

The recovery current, which can be generated in an extremely shortperiod of 1 nanosecond or shorter, produces a great change of current.Thus, the surge voltage generated by the recovery current is generallydependent on the inductance of the conductor connected with the chip.According to the structure of the invention, the aluminum wires 21 a, 21b, 22 a, 22 b, 23 a, 23 b, 24 a, and 24 b as the connection conductorsbetween the IGBT chips 1 a, 1 b, 3 a, and 3 b, and the diode chips 2 a,2 b, 4 a, and 4 b have substantially the same length. Therefore, therespective inductances are uniform.

As a consequence of the foregoing effects, the inductance in therecovery current channel Ipn becomes equal to or lower than thecorresponding inductance in the related art, and the voltage surgegenerated by the recovery current is equalized based on the fact thatthe inductances of the connection conductors of the respective chips areuniform. Accordingly, the switching speed increases, while the withstandvoltage of the chips lowers, in which condition the size of the powerconverter and the cost of the cooler and the power converter decrease.In FIG. 1, the current channels Ip, In, and Ipn are separately shown inthe areas U, V, and W, respectively. However, the current channels Ip,In, and Ipn are formed not only in the specific areas shown in thefigure, but also in all of the areas U, V, and W.

The current channels Ip, In, and Ipn discussed in this embodiment areproduced by such an arrangement that the connecting portions between theterminal stand 30 and these channels Ip, In, and Ipn on the insulatingsubstrate 10 are disposed at one end of the insulating substrate 10. Inother words, the current channels Ip, In, and Ipn can be formed by suchan arrangement that both the input terminals through which the maincurrent is inputted to the power module and the output terminal throughwhich the main current is outputted from the power module are disposedat one end of the power module, i.e., the end opposite to the drivermodule in this embodiment.

FIG. 8 illustrates a power converter according to a related art as acomparison example for this embodiment. An insulating substrate 310 onwhich the chips such as the upper arm IGBT chip 1 a according to thisembodiment are mounted is disposed in the lower layer in such acondition that the upper arm and the lower arm are separated. A printedboard 340 containing the driver circuit and the power source circuit isdisposed on the insulating substrate 310 and fixed thereto. Theinsulating substrate 310 and the printed board 340 are connected witheach other via gate pins 371 a and 371 b provided on the front and rearsides. Power source transformers 360 are disposed substantially at thecenter of the printed board 340.

In the related art, current flowing between the insulating substrate 310and the printed board 340 such as gate current and leakage currentproduced by surge voltage passes through the gate pins 371 a and 371 b.In the respective current channels, the current channel which passesthrough the insulating substrate 310, the gate pin 371 a, the printedboard 340, and the gate pin 371 b, and returns to the insulatingsubstrate 310 has the longest length. The inductance in this currentchannel is high. Moreover, in the current channel which makes a round,the current becomes a loop current around the space between theinsulating substrate 310 and the printed board 340. In the related art,therefore, there are produced oscillation of gate current along with theincrease in the switching speed, and lowering of noise resistance by theloop current and the high inductance. Under this condition, the chipscan be accidentally turned on, and can be burnt in the worst case.

According to the structure of the invention, however, the gate currentflows along a channel Igp shown in FIG. 3 which passes through thedriver circuit 52, the upper arm gate pattern 42, the terminal 50, thealuminum wire 71, the upper arm gate wiring patterns 14 a and 14 b, thealuminum wires 25 a and 25 b, the gate electrodes 6 a and 6 b, theemitter electrodes of the IGBT chips 1 a and 1 b, the aluminum wires 21a and 21 b, the alternating current wiring pattern 12 a, the aluminumwire 71, the terminal 50, and the alternating current pattern 43, andreturns to the driver circuit 52. Accordingly, the upper arm gate wiringpatterns 14 a and 14 b function as high potential side gate wirings,while the alternating current wiring pattern 12 a functions as a highpotential side emitter wiring in this embodiment.

On the other hand, the gate current flows along a channel Ign shown inFIG. 3 which passes through the driver circuit 52, the lower arm gatepattern 44, the terminal 50, the aluminum wire 71, the lower arm gatewiring patterns 15 a and 15 b, the aluminum wires 26 a and 26 b, thegate electrodes 7 a and 7 b, the emitter electrodes of the IGBT chips 3a and 3 b, the aluminum wires 23 a and 23 b, the negative electrodewiring pattern 13, the aluminum wire 71, the terminal 50, and thenegative electrode wiring pattern 45, and returns to the driver circuit52. Accordingly, the lower arm gate wiring patterns 15 a and 15 bfunction as low potential side gate wirings, while the negativeelectrode wiring pattern 13 functions as a low potential side emitterwiring in this embodiment.

According to this embodiment, currents constantly opposed to each otherflow adjacent to each other in the gate current channels Igp and Ign asillustrated in FIG. 3. As discussed above, the effect of demagnetizingthe magnetic field generated as a result of the change of current isproduced when opposed currents flow adjacent to each other. This effectreduces the inductances. Moreover, since the insulating substrate 10 andthe printed board 40 are disposed adjacent to each other, the length ofthe aluminum wire 71 as the connection conductor becomes the minimum.

As a consequence of the foregoing effects, the inductances in the gatecurrent channels Igp and Ign become considerably lower than those in therelated art shown in FIG. 8. In this case, the possibility ofoscillation of gate current resulting from increase in the switchingspeed is eliminated, wherefore the switching speed further increases.Accordingly, the switching loss decreases, and the fuel cost of thevehicle improves. Moreover, the noise resistance rises by reduction ofthe inductances, and the reliability increases by prevention of theconditions which accidentally turn on the chips as noted above or otherproblems.

The problem of the leakage current produced by the surge voltage arisesfrom transmission of the surge voltage. According to the structure inthis embodiment, the surge voltage generated by switching in FIGS. 4 and5 is transmitted to the printed-wiring board 40 via the aluminum wire 71and the terminals 50. In this case, leakage current having a highfrequency is produced from the surge voltage thus transmitted, the straycapacitances of the printed-wiring board 40 and the power sourcetransformer 60, and the capacitances of other components contained inthe printed-wiring board 40.

For example, the surge voltage transmitted to the alternating currentpattern 43 reaches the upper arm power source−pattern 47− connected viathe internal pattern of the printed-wiring board 40. As a result,leakage current between the upper arm secondary coil 66 and the lowerarm secondary coil of the power source transformer 60 is produced fromthe surge voltage transmitted to the upper arm power source−pattern 47−,and the stray capacitance between the upper arm secondary coil 66 andthe lower arm secondary coil. This leakage current chiefly flows along achannel Ir shown in FIG. 4 which passes through the IGBT chips 3 a and 3b or the diodes 4 a and 4 b, the alternating current wiring pattern 12a, the aluminum wire 71, the wiring 50, the alternating current pattern43, the upper arm power source−pattern 47−, the upper arm secondary coil66, the lower arm secondary coil 67, the lower arm power source−pattern48−, the negative electrode pattern 45, the wiring 50, the aluminum wire71, and the negative electrode wiring pattern 13 in the shape of loopvia the aluminum wires 23 a, 23 b, 24 a, and 24 b.

The leakage current channel Ir shown in FIG. 4 forms a substantially Vshape within the printed-wiring board 40, and also forms a substantiallyV shape on the insulating substrate 10 with the lower arm chipscorresponding to the bottom of the V shape. According to this structure,the leakage current flows while forming eddies on the printed-wiringboard 40 and the insulating substrate 10. These eddies generate magneticforce lines around the axis of the eddy center in the directionperpendicular to the planes of the insulating substrate 10 and theprinted-wiring board 40. These magnetic force lines produce eddy currentin the conductive layer of the insulating substrate 10, the conductivelayer of the printed-wiring board 40, the base 20, and the frame 80. Asa consequence of these effects, the inductance in the leakage currentchannel Ir decreases, whereby the noise produced by the leakage currentlowers. Other leakage currents produced by the surge voltage loopbetween the insulating substrate 10 and the printed-wiring board 40, andtherefore provide similar effects.

It is estimated that the leakage current produced by the surge currentflows in any positions on the printed-wiring board 40. On the otherhand, current flows in the channel where the energy during flow becomesthe minimum, and therefore flows in an area where the potentialdifference between the flow channels is lower. According to thestructure of the invention, the wiring patterns 41, 42, 43, 44, 45, 47+,47−, 48+, and 48− through which the surge voltage is chiefly transmittedin the wiring patterns on the printed-wiring board 40 are disposed suchthat the average voltage between the adjoining patterns becomes theminimum, that is, disposed in the order of the potentials of thevoltages to be applied. According to this structure, the leakage currentmore easily flows between the opposed patterns. Thus, the inductancesdecrease by the effect of demagnetizing the magnetic field generated bythe opposed currents, and the noise produced by the leakage currentlowers.

Moreover, the wiring patterns 41, 42, 43, 44, 45, 47+, 47−, 48+, and 48−are disposed on the printed-wiring board 40 substantially in the orderof the average voltage, and can be connected without crossing eachother. In other words, wiring is allowed in the same manner as in theequivalent circuit diagram of the printed-wiring board 40 shown in FIG.5, wherefore no line crosses other lines. According to this structure,the wiring patterns 41, 42, 43, 44, 45, 47+, 47−, 48+, and 48− do notinterfere with each other, and have short wiring lengths and lowinductances. As a consequence of these effects, the noise produced fromthe leakage current generated by the surge voltage decreases, and thenoise resistance increases by reduction of the inductances. Therefore, apower converter having high reliability can be provided.

According to the structure of the invention shown in FIGS. 1 through 7,the thermistors 5 a and 5 b are disposed in the vicinity of the chips,and the thermistor wiring patterns 17 a, 17 b, 18, and 19, and thethermistor pattern 46 forming a transmission line for the thermistors 5a and 5 b are provided on the upper boundaries of the respective areasU, V, and W. Thus, the thermistor pattern 46 can be connected with thegate pin 70 without crossing the areas U, V, and W.

The low voltage terminals 65 of the power source transformer 60 and theswitching circuit 53 are also disposed on the boundaries between therespective areas U, V, and W. According to this structure, signals linesand others can be similarly connected with the gate pin 70 withoutcrossing the areas U, V, and W. In this case, the surge voltagegenerated by switching as discussed above has only small effects on thesignal lines of the thermistors 5 a and 5 b, the switching circuit 53,and the signal line of the switching circuit 53. Similarly, the voltagefluctuations of the driver circuit 52 have only small effects. Thus,high reliability can be maintained by reduction of the noise of thesignal lines and increase in the accuracy of the signal output.

The general structure of the power converter according to thisembodiment is now described. FIG. 13 is a cross-sectional view takenalong a line A-A in FIG. 1. According to this embodiment, the drivermodule and the power module are provided adjacent to each other suchthat the surface on which the driver module side wirings discussed aboveare disposed and the surface on which the power module side wiringsdiscussed above are provided are disposed substantially parallel witheach other as illustrated in FIG. 9. In the figure, the terminal stand30, the insulating substrate 10, the printed-wiring board 40, and thegate pin 70 are attached via screws or the like to one flat surface ofthe frame 80 as a one-piece conductor. Similarly, the aluminum ribbon72, and the aluminum wires 71 and 73 connecting the respectivecomponents are disposed substantially on the same flat surface. In thiscase, the current channels Ip, In, Ipn, Igp, Ign, Ir, and Ihv discussedabove pass on the same plane. Thus, the respective current loopsgenerate eddy current on the frame 80 and reduce the inductances.

The positive electrode bus bar 31, the alternating current bus bar 32,and the negative electrode bus bar 33, each having a plate shape, arelaminated on each other on the terminal stand 30. The respective bars31, 32, and 33 are made of resin, and formed and held by insert molding,for example. The external interface 34 is produced by these bus barsextended in the left direction in the figure, and connected with anexternal bus bar 85, or a direct current capacitor 84 via screws or thelike. The figure shows the connection portion between the alternatingcurrent bus bar 32 and the external bus bar 85.

According to this structure, the respective bus bars 31, 32, and 33 onthe terminal stand 30 can be formed from one plate such as a copperplate, by metal press working which requires only a small number ofsteps, and therefore can lower the cost. Moreover, the arrangement ofall the components of the external interface 34 in a line can facilitatethe connection between the external bus bar 85 and the capacitor 84, andshorten the processing time. Furthermore, by lamination of therespective bus bars, the currents flowing in the bus bars overlap witheach other, in which condition the inductances of the bus bars decrease.

The gate pin 70 is connected with a control board 83 containing an uppercontrol circuit which controls the driver circuit 52 and others on theprinted-wiring board 40. In this embodiment, the gate pin 70 and thecontrol board 83 are brazed to each other by solder. The power sourcecircuit 51, the driver circuit 52, the switching circuit 53 to whichhigh voltage is applied are mounted on the printed-wiring board 40, andsectioned into the areas U, V, and W as discussed above. According tothis structure, signals flowing in the gate pin are weak current signalssuch as PWM signals of the thermistors 5 a and 5 b and the drivercircuit 52, ON/OFF signals of the switching circuit 53, and the powersource line of the power source circuit 51. In this case, the insulationdistance between the respective pins of the gate pin 70 can beshortened. Thus, the size and the cost of the gate pin 70 can bereduced.

The frame 80 has a cooling water channel 82 for cooling the chips 1 a, 1b, 2 a, 2 b, 3 a, 3 b, 4 a, and 4 b below the above-noted flat surfaceto which the insulating substrate 10 and the printed-wiring board 40 areattached. The cooling water channel 82 is disposed substantially in anarea just below the insulating substrate 10 and the printed-wiring board40, and tightly closed by a water channel cover 81 formed by aluminumdie casting or the like. The frame 80 has a fin within the cooling waterchannel 82, for example. According to this structure, the cooling waterchannel 82 simultaneously cools heat generated by the printed-wiringboard 40 as well, which contributes to reduction of the sizes of theheating components such as the power source transformer 60 and reductionof the cost.

The area of the frame 80 up to a dotted line in the figure, for example,is filled with gel 86 such as silicon compound gel such that the gel 86covers the aluminum ribbon 72, the aluminum wires 71 and 73 and others.The frame 80 has walls outside the terminal stand 30, the insulatingsubstrate 10, the printed board 40, and the gate pin 70 so as to coverthe gel 86 by the walls. This structure eliminates the necessity forequipping walls connecting the terminal stand 30 and the gate pin 70,that is, the wall covering the outer periphery of the insulatingsubstrate 310 equipped in the related art shown in FIG. 8. Thus,reduction of the sizes of the terminal stand 30 and the gate pin 70, andreduction of the cost can be achieved. Moreover, heat generated from theprinted board 40 can be diffused through the gel 86, which contributesto reduction of the sizes of the heat generating components such as thepower source transformer 60.

As described above, the respective terminals of the driver module sidewirings, the power module side wirings, and the power source transformer60 included in the power converter in this embodiment are arranged incorrespondence with each other. In this case, inductances can be loweredby avoidance of crossing of the wirings. Moreover, the frame 80 isprovided as a conductor electrically connected in such a condition as tosurround magnetic flux generated by leakage current looping at leastthrough the power source path transformer 60, the driver module sidewirings, and the power module side wirings. In this case, the inductanceof the leakage current can be reduced by the cancelling effect of theeddy current generated in the frame 80. Thus, a highly reliable,low-cost, and compact power converter can be produced.

Embodiment 2

FIG. 9 illustrates the details of an enlarged part of the insulatingsubstrate 10 of a power converter according to this embodiment,corresponding to FIG. 2 in the embodiment 1. According to thisembodiment, an upper gate return wiring pattern 212 is provided betweenthe gate wiring pattern 14 a and the alternating current wiring pattern12 a on the insulating substrate 10 substantially in parallel with therespective patterns 14 a and 12 a as illustrated in FIG. 10. The uppergate return wiring pattern 212 is connected with the emitter electrodesof the upper arm IGBT chips 1 a and 1 b via aluminum wires 221 a and 221b. The upper gate return wiring pattern 212 is further connected withthe terminal 50 of the alternating current pattern 43 via the aluminumwire 71. In this embodiment, therefore, the upper gate return wiringpattern 212 functions as a high potential side emitter wiring. On theother hand, the alternating current wiring pattern 12 a functions as alow potential side collector wiring.

Similarly, a lower gate return wiring pattern 213 is provided betweenthe lower gate wiring pattern 15 b and the negative electrode wiringpattern 13 on the insulating substrate 10 substantially in parallel withthe respective patterns 15 b and 13 in this embodiment. The lower gatereturn wiring pattern 213 is connected with the emitter electrodes ofthe lower arm IGBT chips 3 a and 3 b via aluminum wires 223 a and 223 b.The lower gate return wiring pattern 213 is further connected with theterminal 50 of the negative electrode wiring pattern 45 via the aluminumwire 71. In this embodiment, therefore, the lower gate return wiringpattern 213 functions as a low potential side emitter wiring. On theother hand, the negative electrode wiring pattern 13 functions as anoutput terminal wiring. Other components included in the power converterin this embodiment are similar to the corresponding components shown inFIGS. 1 through 7.

According to this structure, the gate current channel Igp shown in FIG.3 passes not through the alternating current wiring pattern 12 a butthrough the upper gate return wiring pattern 212. On the other hand, thegate current channel Ign shown in FIG. 3 passes not through the negativeelectrode wiring pattern 13 but through the lower gate return wiringpattern 213. The gate current channels in FIG. 9 are channels whereconstantly opposed currents flow adjacent to each other similarly to thecurrent channels Igp and Ign shown in FIG. 3, and therefore provideeffects similar to those of the current channels shown in FIG. 3.

FIG. 11 is an equivalent circuit diagram of the power converteraccording to this embodiment, corresponding to FIG. 5 in theembodiment 1. This circuit structure can stabilize the respective gatevoltages in the gate current circuits Igp and Ign in this embodiment.

Embodiment 3

FIG. 10 illustrates an example of the insulating substrate 10 whichcontains one chip for each type of chips in the power converter shown inFIGS. 1 through 7, corresponding to FIG. 2 in the embodiment 1. Asillustrated in FIG. 12, the upper arm IGBT chip 1 a, the upper arm diodechip 2 a, the lower arm IGBT chip 3 a, and the lower arm diode chip 4 aare disposed one for each on the insulating substrate 10 in thisembodiment. The gate electrode of the upper arm IGBT chip 1 a isconnected with the upper arm gate wiring pattern 14 a, and the gateelectrode of the lower arm IGBT chip 3 a is connected with the lower armgate wiring pattern 15 a. The aluminum ribbon 72 is directly connectedwith the alternating current wiring pattern 12 a. Other structures aresimilar to the corresponding structures shown in FIGS. 1 through 6, andprovide similar effects. The structures in this embodiment can offeradvantages similar to the advantages described above.

Embodiment 4

FIG. 12 illustrates the details of an enlarged part of a power converteraccording to this embodiment, corresponding to FIG. 3 in theembodiment 1. As illustrated in FIG. 13, the thermistor wiring pattern18 disposed near the upper end of the insulating substrate 10 functionsas a negative electrode high voltage wiring pattern, and the thermistorwiring pattern 19 functions as a positive electrode high voltage wiringpattern in this embodiment. A negative electrode high voltage wiring busbar 33 a is provided on the terminal stand 30, while a negativeelectrode high voltage pattern 49− and a positive electrode high voltagepattern 49+ are provided on the printed-wiring board 40.

The negative electrode high voltage wiring pattern and the positiveelectrode high voltage wiring pattern are positioned on the side of thewiring to which the highest potential is applied in the power moduleside wirings discussed above (hereinafter referred to as the highestpotential wiring), i.e., on the side of the positive electrode wiringpattern 11 in this embodiment, corresponding to the side opposite to theside where other patterns to which lower potential than the potentialfor the positive electrode wiring pattern 11 is applied are disposed.

The negative electrode high voltage wiring pattern is connected with thenegative electrode high voltage wiring bus bar 33 a via an aluminum wire28, and connected with the negative electrode high voltage pattern 49−via the aluminum wire 71. The positive electrode high voltage wiringpattern is connected with the positive electrode wiring pattern 11 viaan aluminum wire 29, and connected with the positive electrode highvoltage pattern 49+ via the aluminum wire 71.

The negative electrode high voltage wiring bus bar 33 a is constitutedby the same metal plate as that of the negative electrode bus bar 33,and held by insulating material such as resin. Other components in FIG.13 are similar to the corresponding components shown in FIGS. 1 through7. According to this structure, direct current voltages applied to thepositive electrode bus bar 32 and the negative electrode bus bar 33 onthe terminal stand 30 can be extracted using a current channel Ihv shownin FIG. 13 via the insulating substrate 10 and the printed board 40. Inother words, the negative electrode high voltage wiring patternfunctions as a lowest potential extracting wiring, while the positiveelectrode high voltage wiring pattern functions as a highest potentialextracting wiring. The currents flowing in the channel Ihv constantlypass adjacent to each other. The IGBT chips 1 a, 1 b, 3 a, and 3 b andthe diodes 2 a, 2 b, 4 a, and 4 b do not cross each other. According tothis structure, the inductance in the current channel Ihv at directcurrent voltage is low, and the effect of the voltage surge generated byswitching is small.

Another example using the structure shown in FIG. 13 is furtherexplained. When the structure shown in FIG. 13 is applied to the area Uin FIG. 1, the current channel Ihv is disposed along the upper end ofthe printed board 40 and connected with the gate pin 70. According tothis structure, currents flowing in the current channel Ihv constantlypass adjacent to each other without crossing the power source circuit51, the driver circuit 52, and the switching circuit 53 on the printedboard 40. Thus, the inductance is low, and the effect of the voltagesurge generated by switching is small.

When thermistors are attached to the structure shown in FIG. 13 in placeof the aluminum wires 28 and 29, the structure shown in FIG. 3 isproduced. In this case, the insulating substrates 10 a, 10 b, and 10 ccan be used as common components even in the case of the example shownin FIG. 1 which includes the structure shown in FIG. 13 for the area Uand a structure different from the structure shown in FIG. 3 for each ofthe areas V and W. Thus, reduction of the cost can be achieved.Therefore, a low-noise and high noise resistant power converter can beprovided at low cost according to the invention.

As discussed above, signals flowing in the gate pin 70 in FIG. 9 becomeonly weak current signals, and achieve reduction of the size and cost.According to the structure shown in FIG. 13, however, direct currentvoltage is applied to the gate pin 70. In this case, the current channelIhv at direct current voltage is similarly located near the end of thegate pin 70 as illustrated in FIG. 13. Thus, the insulation distancebetween the two pins at direct current voltage and the distance betweenother pins and the two pins are only required to be increased, whichsimilarly achieves reduction of the size and cost.

The two pins at direct current voltage of the control board 83 shown inFIG. 13 are separated from other pins. In this case, the block to whichhigh voltage is applied such as a voltage detection block at highvoltage can be easily separated from a control block which outputs PWMand others without crossing of the respective signal lines within theboard. Accordingly, the control board 83 becomes a low-noise and highnoise-resistant control board. Moreover, the necessity for introducingdirect current voltage into the control board 83 using other means suchas a high voltage harness is eliminated. This elimination of the highvoltage harness reduces the cost.

Embodiment 5

FIG. 14 illustrates a part of the insulating substrate 10 and theprinted-wiring board 40 of a power converter in this embodiment. Asillustrated in FIG. 14, a power source transformer 60 d in thisembodiment has the upper arm secondary coil 66 and the lower armsecondary coil 67 discussed in FIG. 5 for each of the areas U, V, and W.This structure produces the power source circuit 51 for each of theareas U, V, and W.

Terminals of the power source transformer 60 d are disposed in the orderof an upper arm power source+terminal 61U, an upper arm powersource−terminal 62U, a lower arm power source+terminal 63U, and a lowerarm power source−terminal 64U for the area U, an upper arm powersource+terminal 61V, an upper arm power source−terminal 62V, a lower armpower source+terminal 63V, and a lower arm power source−terminal 64V forthe area V, and an upper arm power source+terminal 61W, an upper armpower source−terminal 62W, a lower arm power source+terminal 63W, and alower arm power source−terminal 64W for the area W in the anticlockwisedirection in the figure along the outer periphery of the electrictransformer 60 d.

The power source circuit 51 and the driver circuit 52 are provided foreach of the areas U, V, and W. The switching circuit 53 is disposedaround the low voltage terminals 65 without crossing the areas U, V, andW. According to this structure, only one unit of the power sourcetransformer 60 d is required, which contributes to reduction of the sizeand the cost. In the case of the example shown in FIG. 14, thethermistor wiring crosses the areas U, V, and W when the thermistorwiring passes below the power source transformer 60 d, for example.However, other structures are similar to the corresponding structuresshown in FIGS. 1 through 6, and provide similar effects.

Embodiment 6

FIG. 15 illustrates the details of an enlarged part of a power converteraccording to this embodiment. FIG. 16 is a cross-sectional view takenalong a line B-B in FIG. 15. According to this embodiment, the drivermodule and the power module are disposed such that the surface on whichthe driver module side wirings discussed above are provided and thesurface on which the power module side wirings discussed above areprovided are disposed substantially in parallel with each other andoverlapped with each other as illustrated in FIG. 16. The printed board40 in this embodiment is fixed via screws or the like to a board plate87 formed from a conductor such as an aluminum die casting, and mountedon the board plate 87. The board plate 87 is fixed to a plate supportpole 86 by screws or the like to be electrically connected with theplate support pole 86. The plate support pole 86 electrically connectedwith the frame 80 as a conductor is formed from an aluminum die castingor the like and formed integrally with the frame 80.

The printed board 40 is connected with the insulating substrate 10 viathe gate pin 70. The insulating substrate 10 is connected with the gatepin 70 via an aluminum wire or the like. The terminals 50 constituted bylands or the like are provided near one side of the printed board 40,and connected with the gate pin 70 by solder or the like. The terminals50 are electrically connected with the wiring patterns on the printedboard 40. The wiring patterns and the terminals 50 are disposed in theorder of the thermistor pattern 46, the positive electrode pattern 41,the upper arm gate pattern 42, the alternating current pattern 43, thelower arm gate pattern 44, and the negative electrode pattern 45 fromthe upper side.

The power source transformer 60 is mounted on the printed board 40.Terminals of the power source transformer 60 are disposed in the orderof the upper arm power source+terminal 61, the upper arm powersource−terminal 62, the lower arm+power source terminal 63, the lowerarm−power source terminal 64 from the upper side. The insulatingsubstrate 10 is structured similarly to the insulating substrate 10 inFIG. 2. According to the structure explained herein, leakage currentgenerated by switching surge flows substantially along the currentchannel Ir shown in FIG. 15 on the printed board 40, and becomes a loopcurrent crossing over the gate pin 70 and the insulating substrate 10.This loop current produces orthogonal magnetic flux φ.

The plate support pole 86 discussed above is disposed at a positioncrossing the orthogonal magnetic flux φ, i.e., in the vicinity of thethermistor pattern 46 and in the vicinity of the negative electrodepattern 45, for example, and electrically connected with the board plate87 and the frame 80. In other words, the board plate 87, the platesupport pole 86, and the frame 80 are similarly provided in thisembodiment as electrically connected conductors in such positions as tosurround magnetic flux generated by leakage current looping through thepower source path transformer 60, the driver module side wirings, andthe power module side wirings. In this case, eddy current loopingthrough the plate support pole 86, the board plate 87, and the frame 80is produced by the orthogonal magnetic flux φ, and decreases theinductance in the leakage current channel Ir. Other structures aresimilar to the corresponding structures shown in FIGS. 1 through 6, andprovide similar effects.

Embodiment 7

FIG. 17 illustrates the details of an enlarged part of a power converteraccording to this embodiment. FIG. 18 is a cross-sectional view takenalong a line C-C in FIG. 17. FIG. 19 is a perspective view illustratinga cross section taken along a line D-D in FIG. 18. The power converterin this embodiment has an insulating mold 90 on which the chips aremounted in place of the insulating substrate 10, and the structureprovided on the mold 90 functions as a power module. According to thisembodiment, the driver module and the power module are disposed suchthat the surface on which the driver module side wirings discussed aboveare provided and the surface on which the power module side wiringsdiscussed above are provided cross each other substantially at rightangles as illustrated in FIG. 18. In the condition shown in FIG. 19, anemitter electrode and the upper arm gate electrode 6 a are provided onthe upper surface of the upper arm IGBT chip 1 a, while a collectorelectrode is equipped on the lower surface of the upper arm IGBT chip 1a. On the other hand, an anode electrode is provided on the uppersurface of the upper arm diode chip 2 a, while the cathode electrode isequipped on the lower surface of the upper arm diode chip 2 a.

Each of the lower arm IGBT chip 3 a and the lower arm diode chip 4 a hassimilar terminals. The lower surfaces of the upper arm IGBT chip 1 a andthe upper arm diode chip 2 a are brazed to a positive electrode lead 91by solder or the like, while the emitter electrode on the upper surfaceof the upper arm IGBT chip 1 a and the cathode electrode on the upperarm diode chip 2 a are connected with a first alternating current lead92 by solder or the like. The upper arm gate electrode 6 a is connectedwith the gate pin 70 via the aluminum wire 25 a to be connected with theprinted-wiring board 40 via the gate pin 70.

The lower surfaces of the lower arm IGBT chip 3 a and the lower armdiode chip 4 a are brazed to a second alternating current lead 93 bysolder or the like, while the emitter electrode on the upper surface ofthe lower arm IGBT chip 3 a and the cathode electrode on the lower armdiode chip 4 a are connected with a negative electrode lead 94 similarlyby solder or the like. The lower arm gate electrode 7 a is connectedwith the gate pin 70 via the aluminum wire 26 a to be connected with theprinted-wiring board 40 via the gate pin 70.

The emitter electrode on the upper arm IGBT chip 1 a is furtherconnected with the gate pin 70 via the aluminum wire 221 a, while theemitter electrode on the lower arm IGBT chip 3 a is connected with thegate pin 70 via the aluminum wire 223 a. These connections, that is, theconnections between the gate pin 70 and the aluminum wires 221 a and 223a have functions similar to the functions of the upper gate returnwiring pattern 212 and the lower gate return wiring pattern 213explained in FIGS. 10 and 11.

The thermistor 5 a is connected between the pins of the gate pin 70 bysolder or the like to measure the temperature increase of the respectiveleads 91 through 94 resulting from generation of heat from the upper armIGBT chip 1 a, the upper arm diode chip 2 a, the lower arm IGBT chip 3a, and the lower arm diode chip 4 a. According to this structure,measurement signals from the thermistor 5 a are transmitted via the gatepin 70 to the upper controller such as the control board 83 discussed inFIG. 9.

The first alternating current lead 92 and the second alternating currentlead 93 are joined to each other by a lead junction 95 using solder orthe like. The respective leads 91 through 94, the aluminum wires 25 a,26 a, 221 a, and 223 a, the thermistor 5 a, and a part of the lead 70are sealed by the resin insulating mold 90 such as a transfer mold.

In FIG. 17, the respective leads 91 through 94, and the mold 90 aresandwiched between a first substrate 88 and a second substrate 89 via aninsulating sheet. The first substrate 88 and the second substrate 89 aremade of conductive materials such as aluminum and aluminum alloy, andformed by forging press or other methods. Spaces are produced betweenthe frame 80 and the surfaces of the first substrate 88 and the secondsubstrate 89 on the side opposite to the side holding the respectiveleads 91 through 94 and the mold 90. These spaces function as thecooling water channel 82. The first substrate 88 and the secondsubstrate 89 are electrically connected with the frame 80.

The printed-wiring board 40 is fixed via screws or the like to the boardplate 87 formed from a conductive material such as an aluminum diecasting to be mounted on the board plate 87. The board plate 87 is fixedto the plate support pole 86 by screws or the like to be electricallyconnected to the plate support pole 86. The plate support pole 86 iselectrically connected with the frame 80. The plate support pole 86 isformed from an aluminum die casting or the like and formed integrallywith the frame 80. The printed-wiring board 40 has the terminals 50constituted by lands or the like on the one side thereof. The terminals50 are provided near one side of the printed-wiring board 40, andconnected with the gate pin 70 by solder or the like.

The terminals 50 are electrically connected with the wiring patterns onthe printed-wiring board 40. The wiring patterns and the terminals 50are disposed in the order of the upper arm gate pattern 42, thealternating current pattern 43, the lower arm gate pattern 44, thenegative electrode pattern 45, and the thermistor pattern 46 from thelower side in FIG. 17. The power source transformer 60 is mounted on theprinted-wiring board 40. The terminals on the power source transformer60 are disposed in the order of the upper arm power source+terminal 61,the upper arm power source−terminal 62, the lower arm+power sourceterminal 63, and the lower arm−power source terminal 64 from the lowerside in FIG. 17.

According to the structure shown in FIGS. 17 through 19, leakage currentgenerated by switching surge flows substantially along the leakagecurrent channel Ir shown in the figure on the printed-wiring board 40.For example, when leakage current is generated between the alternatingcurrent pattern 43 and the negative electrode pattern 45 having minuspotentials on the upper arm and the lower arm, the leakage currentbecomes a loop current crossing over the gate pin 70, the negativeelectrode lead 94, the lower arm IGBT chip 3 a or the lower arm diodechip 4 a, the second alternating current lead 93, and the firstalternating current lead 92. This loop current produces the orthogonalmagnetic flux φ.

As illustrated in FIG. 17, the plate support pole 86 discussed above isdisposed in the vicinity of the thermistor pattern 46 and in thevicinity of the upper arm gate pattern 42 in such a manner as to crossover the orthogonal magnetic flux φ. The plate support pole 86 iselectrically connected with the board plate 87, the frame 80, the firstsubstrate 88, and the second substrate 89 as explained above. Accordingto this embodiment, the board plate 87, the plate support pole 86, theframe 80, the first substrate 88, and the second substrate 89 aresimilarly disposed as electrically connected conductors in suchpositions as to surround magnetic flux generated by leakage currentlooping through the power source path transformer 60, the driver moduleside wirings, and the power module side wirings. In this case, eddycurrent looping through the board plate 87, the frame 80, the firstsubstrate 88, and the second substrate 89 via the plate support pole 86is produced, and this eddy current decreases the inductance in theleakage current channel Ir. Other structures are similar to thecorresponding structures shown in FIGS. 1 through 6, and provide similareffects.

Embodiment 8

FIG. 20 illustrates the details of an enlarged part of theprinted-wiring board 40 included in a power converter according to thisembodiment. As illustrated in FIG. 20, the upper gate powersource−pattern 47− and the lower gate power source−pattern 48− on theprinted-wiring board 40 in this embodiment are disposed adjacent to eachother, and positioned on a layer such as a second layer other than thetop surface layer of the printed board 40. The terminals 50 are arrangednear one side of the printed-wiring board 40. The connection portionbetween the terminals 50 and the upper arm gate pattern 42, thealternating current pattern 43, the lower arm gate pattern 44, and thenegative electrode pattern 45 is disposed on the top surface layer ofthe printed board 40.

The upper arm power source−terminal 62 and the lower arm powersource−terminal 64 on the power source transformer 60 are connected withthe upper gate power source−pattern 47− and the lower gate powersource−pattern 48−, respectively, on the second layer. The upper armpower source+terminal 61 and the lower arm power source+terminal 63 areconnected with the upper gate power source−pattern 47+ and the lowergate power source−pattern 48+, respectively, on an arbitrary layer suchas the top surface layer. The upper gate power source−pattern 47− isconnected in the area overlapping with the alternating current pattern43, while the lower gate power source−pattern 48− is connected in thearea overlapping with the negative electrode pattern 45.

As illustrated in FIG. 20, the terminals 50 and the wiring patternsconnecting with the terminals 50 are disposed in the order of thealternating current pattern 43, the upper arm gate pattern 42, thenegative electrode pattern 45, and the lower arm gate pattern 44 inpositions adjacent to each other. Similarly, the terminals of the powersource transformer 60 are disposed in the order of the upper arm powersource−terminal 62, the upper arm power source+terminal 61, the lowerarm power source−terminal 64, and the lower arm power source+terminal 63in positions adjacent to each other.

According to this embodiment, the respective terminals of the powersource transformer 60 and the wiring patterns 42 through 45, 47+, 47−,48+, and 48− are disposed in such positions as to be sectionedsubstantially into the upper arm side and the lower arm side as viewedfrom the top surface side of the printed-wiring board 40. In otherwords, current flowing through the upper arm gate pattern 42 and thelower arm gate pattern 44 connected with the upper arm gate wiringpatterns 14 a and 14 b, and the lower arm gate wiring patterns 15 a and15 b, respectively, and current flowing through the alternating currentpattern 43 and the negative electrode pattern 45 connected with thealternating current wiring pattern 12 a and the negative electrodewiring pattern 13, respectively, reach the power source transformer 60via different layers of the printed-wiring board 40.

According to this structure, leakage currents generated by switchingsurge pass through the leakage current channel Ir in the figure, andflow adjacent to each other within the printed-wiring board 40. In thiscase, the inductance in the leakage current channel Ir decreases. On theother hand, the gate currents pass through the gate current channels Igpand Ign in the figure, and flow adjacent to each other on the topsurface layer and the second layer of the printed-wiring board 40. Inthis case, the inductances in the leakage current channels Igp and Igndecrease. Other structures are similar to the corresponding structuresshown in FIGS. 1 through 6, and provide similar effects.

While various embodiments and modifications have been discussed herein,the invention is not limited to these specific examples. Other possiblemodes in light of the teachings within the technical ideas of theinvention are included in the scope of the invention.

The disclosure of the following application to which this applicationclaims priority is incorporated by reference herein.

Japanese Patent Application No. 2010-066272 (filed Mar. 23, 2010)

The invention claimed is:
 1. A power converter which includes a powermodule allowing supply and cutoff of main current, and a driver modulecontrolling supply and cutoff of the main current allowed by the powermodule, comprising: a high potential side semiconductor device whichallows supply and cutoff of the main current on the high potential sideof the power module; a low potential side semiconductor device whichallows supply and cutoff of the main current on the low potential sideof the power module, and is connected with the high potential sidesemiconductor device in series; plural power module side wiringsconnected with respective electrodes contained in the high potentialside semiconductor device and the low potential side semiconductordevice, and disposed adjacent to each other substantially on the sameplane as the power module in the order of applied potentials with aconnection end between the plural power module side wirings and thedriver module located along the end of the power module; plural drivermodule side wirings provided on the driver module as wirings connectedwith the plural corresponding power module side wirings, and disposed,adjacent to each other substantially on the same plane as the drivermodule in the order corresponding to the positions of the plural powermodule side wirings in positions along the end of the driver module; apower source transformer as a circuit provided on the driver module toconvert a signal voltage for controlling the supply and cutoff of themain current into voltage applied to a control electrode of the highpotential side semiconductor device and a control electrode of the lowpotential side semiconductor device, plural terminals of the powersource transformer in correspondence with the plural driver module sidewirings being provided in the order of the positions of the pluralcorresponding driver module side wirings; and conductors disposed in thevicinity of the plane on which the plural power module side wirings areprovided and in the vicinity of the plane on which the plural drivermodule side wirings are provided, and electrically connected in suchpositions as to surround magnetic flux generated by current looping atleast through the power source transformer, the driver module sidewirings, and the power module side wirings.
 2. The power converteraccording to claim 1, wherein the plural power module side wirings aredisposed substantially on the same plane as the power module in suchpositions that current in one wiring of the power module side wiringsflows in a direction opposed to the flow direction of current in anotherwiring of the power module side wirings disposed adjacent to the onewiring.
 3. The power converter according to claim 1, wherein an inputterminal through which the main current is inputted to the power moduleand an output terminal through which the main current is outputted fromthe power module are disposed at the end of the power module on the sideopposite to the side where the connection end between the power moduleand the driver module is positioned.
 4. The power converter according toclaim 3, wherein: there are provided on the plane where the plural powermodule side wirings are disposed, a highest potential extracting wiringas a side of the highest potential wiring to which the highest potentialis applied in the plural power module side wirings, disposed in an areaon the side opposite to the side where the lowest potential wiring towhich the lowest potential is applied in the plural power module sidewirings is disposed, and electrically connected with the highestpotential wiring, with a connection end between the highest voltageextracting wiring and the driver module disposed at the end of the powermodule on the side where the connection end between the plural powermodule side wirings and the driver module is positioned, and a lowestpotential extracting wiring disposed adjacent to the highest potentialextracting wiring in the area on the opposite side in such a positionthat current flows in a direction opposed to the highest potentialextracting wiring, and electrically connected with the lowest potentialwiring, with a connection end between the lowest potential extractingwiring and the driver module disposed at the end of the power module onthe side where the connection end between the plural power module sidewirings and the driver module is positioned; and the plural drivermodule side wirings contain wirings connected with the highest potentialextracting wiring and the lowest potential extracting wiring, and aredisposed in correspondence with the highest potential extracting wiringand the lowest potential extracting wiring as well.
 5. The powerconverter according to claim 1, wherein a high potential side gatewiring contained in the plural power module side wirings and connectedwith a gate electrode of the high potential side semiconductor device,and a high potential side emitter wiring connected with an emitterelectrode of the high potential side semiconductor device and thecorresponding wiring of the plural driver module side wirings aredisposed adjacent to each other in such positions that flow directionsof currents flowing in the high potential side gate wiring and the highpotential side emitter wiring are opposed to each other.
 6. The powerconverter according to claim 5, wherein the emitter electrode of thehigh potential side semiconductor device is connected in parallel with alow potential side collector wiring connected with the high potentialside emitter wiring and a collector electrode of the low potential sidesemiconductor device.
 7. The power converter according to claim 1,wherein a low potential side gate wiring contained in the plural powermodule side wirings and connected with a gate electrode of the lowpotential side semiconductor device, and a low potential side emitterwiring connected with an emitter electrode of the low potential sidesemiconductor device and the corresponding wiring of the plural drivermodule side wirings are disposed adjacent to each other in suchpositions that flow directions of currents flowing in the low potentialside gate wiring and the low potential side emitter wiring are opposedto each other.
 8. The power converter according to claim 7, wherein theemitter electrode of the low potential side semiconductor device isconnected in parallel with the low potential side emitter wiring and anoutput terminal wiring connected with an output terminal which outputsthe main current from the power module.
 9. The power converter accordingto claim 1, wherein: the power module and the driver module are disposedadjacent to each other such that the plane on which the plural powermodule side wirings are provided and the plane on which the pluraldriver module side wirings are provided become substantially parallelwith each other; and the conductors are disposed as integratedconductors in the vicinity of the plane on which the plural power moduleside wirings are provided and in the vicinity of the plane on which theplural driver module side wirings are provided.
 10. The power converteraccording to claim 1, wherein: the power module and the driver moduleare disposed such that the plane on which the plural power module sidewirings are provided and the plane on which the plural driver moduleside wirings are provided become parallel with each other and overlapwith each other; and a first conductor disposed in the vicinity of theplane on which the plural power module side wirings are provided and asecond conductor disposed in the vicinity of the plane on which theplural driver module side wirings are provided are electricallyconnected with each other by a fixing member which fixes at least eitherthe first conductor or the second conductor.
 11. The power converteraccording to claim 1, wherein: the power module and the driver moduleare disposed such that the plane on which the plural power module sidewirings are provided and the plane on which the plural driver moduleside wirings are provided cross each other substantially at rightangles; and a first conductor disposed in the vicinity of the plane onwhich the plural power module side wirings are provided and a secondconductor disposed in the vicinity of the plane on which the pluraldriver module side wirings are provided are electrically connected witheach other by a fixing member which fixes at least either the firstconductor or the second conductor.
 12. The power converter according toclaim 1, wherein: the driver module has a multilayer wiring substrate;and current flowing in the driver module side wirings connected with thepower module side wirings connected with the gate electrodes of the highpotential side semiconductor device and the low potential sidesemiconductor device, and current flowing in the driver module sidewirings connected with the power module side wirings connected with theemitter electrodes of the high potential side semiconductor device andthe low potential side semiconductor device pass through differentlayers in the driver module to reach the power source transformer.